The output of the logic gate in the figure is given as

F3 S.B Madhu 03.06.20 D 3

This question was previously asked in
LPSC ISRO Technical Assistant Electronics 23 Feb 2020 Official Paper
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  1. 0
  2. 1
  3. A
  4. A̅ 

Answer (Detailed Solution Below)

Option 4 : A̅ 
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Detailed Solution

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The given gate is an XNOR gate. NOR gate is an OR gate followed by a NOT gate.

Symbol:

F1 S.B Madhu 02.06.20 D 7

Truth Table:

Input A

Input B

Output

\(Y={\overline{A\oplus B}}\)

0

0

1

0

1

0

1

0

0

1

1

1

 

Output Equation: \(Y={\overline{A\oplus B}}\)

Key Points: 

1) If B is always Low, the output is the inverted value of the other input A, i.e. A̅.

1) The output is low when both the inputs are different.

2) The output is high when both the inputs are the same.

26 June 1

The figure below shows the IEEE/ANSI symbols alongside the traditional symbols for the basic gates:

          F1 S.B Madhu 19.03.20 D6

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