Basic Gates MCQ Quiz in मल्याळम - Objective Question with Answer for Basic Gates - സൗജന്യ PDF ഡൗൺലോഡ് ചെയ്യുക

Key Points

 Universal gate:  

A universal gate is a gate that can implement any Boolean function without the need to use any other gate type. The NAND and NOR gates are universal gates. In practice, this is advantageous since NAND and NOR gates are economical and easier to fabricate and are the basic gates used in all IC digital logic families.

Hence the correct answer is NAND.

NOR gate is the exact reverse of an OR gate.

OR GATE:

Symbol:

Truth Table:

Output Equation: Y = A + B

Key Points: The output is low only when both the inputs are low.

∴ The given gate is either OR gate or AND gate.

NOR Gate:

The truth table for NOR gate:

Note: It gives a low output if either input A or B is high, otherwise, it gives a high output (1).

Important Points

AND GATE

Symbol:

Truth Table:

Output Equation: Y = A.B

Key Points: The output is high only when both the inputs are high.

XOR GATE

Symbol:

Truth Table:

Output Equation: \(Y = {\bf{A}} \oplus {\bf{B}} = \bar AB + \bar A B\)

Key Points: 

1) If B is always High, the output is the inverted value of the other input A, i.e. A̅.

1) The output is low when both the inputs are the same. 

2) The output is high when both the inputs are different.

NAND GATE

Symbol:

Truth Table:

Output Equation: \(Y = \overline {A.B} = \overline A + \overline B\)

Key Points:

1) If A is always High, the output is the inverted value of the other input B, i.e. B̅

2) The output is low only when both the inputs are high

3) It is a universal gate

NOT GATE:

Symbol:

Truth Table:

Output Equation: Y = A̅

Key Points: The output of NOT gate is an invert of the input

Concept:

XOR operator ⊕ is both commutative and associative.

A ⊕ B = AB̅ + A̅.B

A ⊕ A = 0

1 ⊕ A = A̅

0 ⊕ A = A

Calculation:

F(P, Q) = ((1 ⊕ P) ⊕(P⊕Q)) ⊕((P⊕Q) ⊕(Q⊕0) )

F(P, Q) = 1 ⊕ (P ⊕ P) ⊕ Q ⊕ P⊕ (Q  ⊕ Q) ⊕ 0

F(P, Q) = (1 ⊕ 0) ⊕ Q ⊕ P⊕ (0 ⊕ 0)

F(P, Q) = (1 ⊕ Q) ⊕ (P⊕ 0)

F(P, Q) = Q̅  ⊕  P

F(P, Q) = Q̅. P̅ + Q.P

F(P, Q) = P ⊙ Q 

• Booth's algorithm is of interest in the study of computer architecture
• In 1950, the Booth’s algorithm was invented by Andrew Donald Booth while doing research on crystallography at Birkbeck College in Bloomsbury, London
• Booth's multiplication algorithm is a multiplication algorithm that multiplies two signed binary numbers in two's complement notation

The correct answer is 4

Key Points 

• Here's how to realize a NAND gate using NOR gates:
  • Two NOR gates can be used to form an INVERTER (or NOT gate).
• Another two NOR gates can be used to form a basic OR gate.
• System setup:
  • Inputs A and B of the NAND gate are each fed into their own NOR-based inverters, thus creating NOT-A and NOT-B.
  • NOT-A and NOT-B are then fed into the NOR-based OR gate, yielding the equivalent of an NAND operation.

Therefore, the answer is: 4) 4

Explanation:

Assume variable names are as a, b,c

Majority Function means to take those expressions which have more number of 1's than 0's.

F(a,b,c) =a̅bc + ab̅c + abc̅ + abc

minimization using K-map:

F(a,b,c) =ab + bc + ca

2-input NAND gate required for ab + bc + ca

b(a + c) + ca

((b.(a'.c')')'.(c.a)')'

So, 2-input NAND gate require to realize Majority Function are 6

3-input NAND gate required for ab + bc + ca

((a.b)'.(b.c)'.(c.a)')'

So, 3-input NAND gate require to realize Majority Function are 4

Total NAND gates = 2-input NAND gate +3-input NAND gate

Total NAND gates =6 + 4 = 10

Concept:

NOT gate is an ‘Inverter Gate’. The output is the complemented form of the input form i.e. it returns the opposite value to every value entered. Therefore, in order to get a ‘high’ output, the input required is ‘low’.

Different logic gates and their symbols are shown

The truth table of three input AND gate is shown:

The Output is high only when all the inputs are high

The correct answer is AND gates and OR gates

Key Points

• In a Programmable Logic Array (PLA), combinational logic functions are implemented using programmable AND gates and OR gates.
• Input variables are fed into AND gates, where they are combined, and the outputs of these AND gates are then connected to OR gates to produce the final output.
• This flexibility allows designers to customize the circuit for specific logic functions. Therefore, the correct answer is option 1: AND gates and OR gates.

f(A, B) = [A ʘ B] ⊕ [A+B]

\(f\left( {A,B} \right) = \left( {\bar A\bar B + AB} \right)\oplus\left( {{\rm{A}} + {\rm{B}}} \right)\)

\(f\left( {A,B} \right) = \;\overline {\left( {\bar A\bar B + AB} \right)} \left( {A + B} \right){\rm{\;}}\left( {\bar A\bar B + {\rm{AB}}} \right)\left( {\overline {A + B} } \right)\)

\(f\left( {A,\;B} \right) = \;\overline {\bar A\bar B} \;\left( {\overline {AB} } \right)\left( {A + B} \right) + \left( {\bar A\bar B + {\rm{AB}}} \right)\left( {\bar A\bar B} \right)\;\)

\(f\left( {A,\;B} \right) = \left( {A + B} \right)\left( {\bar A + \;\bar B} \right) + \;\bar A\bar B\)

\(f\left( {A,B} \right) = A\bar B + \;\bar AB + \;\bar A\bar B\)

\(f\left( {A,\;B} \right) = \;A\bar B + \bar A\)

\(f\left( {A,\;B} \right) = \;\bar A + \;\bar B\)                     [because, A + A’B = A + B]

It can also be written as  :

\(f\left( {A,\;B} \right) = \;\overline {AB} \)

Two input NAND gate is required to implement this function.